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Legend:
Due: The due date in months after the start of the project on 1 January 2004. For example, 8 means 1 September 2004. Nature: R for Report. P means prototype, O means other. DL: Dissemination Level. PU for public dissemination, RE means "restricted to a group specified by the consortium (including the Commission Services)". CO means "Confidential, only for members of the consortium (including the Commission Services)". Some deliverables have more than one dissemination level. This means that there will be more than one version, typically one public one, and one that is more restricted. Deliverables marked public show up in PublicDeliverables, the other deliverables show up in PrivateDeliverables. Some deliverables show up twice. Delivery Date: The date that the delivery was committed. Deliverable: A link to the deliverable (on its own page). Click field titles to sort the table.| Number | Title | Leading Partner | Due | Nature | DL | Delivery Date | Deliverable |
|---|---|---|---|---|---|---|---|
| D4.1/1 | Project web site | TU Graz | 3 | R | PU | 20040415 | |
| D1.1/1 | Property-Driven Specification of VLSI design | IBM-HRL | 6 | R | PU | 20040630, reissue 20050501 | |
| D3.1/1 | Methodology document on managing the trade-offs between robustness and coverage in a combined static and dynamic verification environment | Infineon | 6 | R | RE/PU | 20040621/20050331 | |
| D3.2/1 | Research report on improved decision heuristics for high-performance SAT-based static property checking. | IBM-HRL | 6 | R | RE/PU | 20040701/20050508, annex 20041101/20050508 | pdf annex pdf |
| D3.2/3 | Research report on exploitation of RT information in static property checking algorithms. | Infineon | 6 | R | CO/PU | 20040616/20050331 | |
| D1.1/3 | Property-by-Example guide: a handbook of PSL/Sugar examples | IBM-HRL | 8 | R | PU | 20040831, reissue 20050501 | |
| D1.2/2 | Novel techniques for property assurance | ITC-Irst | 8 | R | PU | 20040831 | |
| D2.1/1 | Property-driven design and implementation | TU Graz | 8 | R | PU | 20040831, reissue 20050519 | |
| D1.2/1 | Research report on property simulation | TU Graz | 9 | R | PU | 20040930, reissue 20050501 | |
| D1.2/3 | Front-end for PSL/Sugar | IBM-HRL | 9 | P | CO/PU | 20040901/20050412 | tar |
| D1.1/2 | Reuse-aware property-driven specification | STM-UK | 10 | R | PU | 20050125 | |
| D1.3/1 | Proposal for language extensions | Verimag | 12 | R | PU | 20050214 | |
| D4.3/1 | Annual language study and recommendation to Accellera | IBM-HRL | 12 | R | PU | 20050329 | |
| D3.2/2 | Research report on improved symbolic search strategies and model reduction for static property checking. | IBM-HRL | 13 | R | RE/PU | 20050315/20050321 | |
| D4.3/2 | Annual response from Accellera | Accellera | 14 | R | PU | 20050501 | |
| D3.1/2 | Methodology document on effective leverage of various static checking engines. | IBM-HRL | 15 | R | PU | 20050331, posted 20050516 | |
| D2.2/2 | Property-based error localization | TU Graz | 16 | R | PU | 20050501 | |
| D3.2/4 | Research report on automata construction algorithms optimized for PSL/Sugar (static checking) | TU Graz | 16 | R | PU | 20050630 | |
| D3.2/8 | Manual for Improved static property checking tool, based on algorithmic framework reported in 3.2/1, 3.2/2, 3.2/3. | Infineon | 16 | P/R | CO/PU | 20050630/20050724 | |
| D3.3/1 | Manual for Port with VIS | TU Graz | 18 | P/R | PU | 20050630 | pdf ToolDownloads |
| D3.3/2 | Manual for port of IBM-HRL tools | IBM-HRL | 18 | P/R | RE/PU | ||
| D3.3/3 | Manual for port of Infineon tools | Infineon | 18 | P/R | RE/PU | 20050630/20050724 | |
| D3.3/4 | Manual for port of of NuSMV | ITC-Irst | 18 | P/R | PU | 20050719 | pdf Tool Download |
| D3.2/7 | Improved static property checking tool, based on algorithmic framework reported in 3.2/1, 3.2/2. | IBM-HRL | 19 | P/R | PU | 20050731, posted 20050920 | |
| D1.2/6 | Manual for Textual property specification tool | IBM-HRL | 20 | P/R | CO/PU | ||
| D2.2/1 | Property-based logic synthesis for rapid design prototyping | TU Graz | 20 | R | PU | 20050901 | |
| D3.2/5 | Research report on optimized dynamic property checking algorithms for digital designs | Weizmann | 20 | R | RE/PU | ||
| D1.2/4 | Manual for Property simulation tool | TU Graz | 21 | P/R | PU | ||
| D1.2/5 | Manual for Property assurance tool | ITC-Irst | 22 | P/R | PU | ||
| D3.2/9 | Manual for Improved static property checking tool, based on algorithmic framework reported in 3.2/1, 3.2/2. | ITC-Irst | 22 | P/R | RE/PU | ||
| D3.2/14 | Manual for Property-based analysis of simulation traces based on algorithmic framework reported in 3.2/5. | Weizmann | 23 | P/R | PU | ||
| D3.2/6 | Research report on checking digital, timed and analog PSL/Sugar properties, based on 1.3/1. | Verimag | 24 | R | PU | ||
| D4.3/1 | Annual language study and recommendation to Accellera | IBM-HRL | 24 | R | PU | ||
| D4.3/2 | Annual response from Accellera | Accellera | 26 | R | PU | ||
| D3.2/11 | Manual for Property-based automatic generation of test drivers and simulation monitors for digital designs, based on algorithmic framework reported in 3.2/5. | IBM-HRL | 30 | P/R | CO/PU | ||
| D3.2/12 | Manual for Property-based automatic generation of simulation monitors for digital design, based on algorithmic framework reported in 3.2/5. | Infineon | 30 | P/R | CO/PU | ||
| D2.2/3 | Manual for Property-based synthesis tool | TU Graz | 31 | P/R | PU | ||
| D2.2/4 | Manual for Property-based error localization tool | TU Graz | 32 | P/R | PU | ||
| D3.2/10 | Manual for Tool for property-based synthesis of optimized Büchi automata for static analysis, based on algorithmic framework reported in 3.2/4. | TU Graz | 32 | P/R | PU | ||
| D1.4/1 | Joint report 1 Case studies in property based requirements specification | STM-Italy | 33 | R | PU | ||
| D1.5/1 | Manual for Repositories of PSL/Sugar properties | 36 | O/R | PU | |||
| D1.3/2 | Final Proposal for language extension | Verimag | 36 | R | PU | ||
| D2.3/1 | Evaluation of tools and methodology for property-based logic synthesis | IBM-HRL | 36 | R | PU | ||
| D2.3/2 | Evaluation of tools developed for error localization | TU Graz | 36 | R | PU | ||
| D 2.3/3 | Report on experiences in property based design | IBM-HRL | 36 | R | PU | ||
| D3.2/13 | Manual for Property-based automatic generation of simulation monitors for digital, timed, and analog designs, based on algorithmic framework reported in 3.2/6. | Verimag | 36 | P/R | RE/PU | ||
| D3.4/1 | Joint report on case studies in property based verification | STM-UK | 36 | R | PU | ||
| D4.2/2 | Technology implementation plan | IBM | 36 | R | PU | ||
| D4.3/1 | Annual language study and recommendation to Accellera | IBM-HRL | 36 | R | PU | ||
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